Method of forming a capacitative section of a semiconductor device and method of forming a capacitative section and gate section of a semiconductor device

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United States of America Patent

PATENT NO 6096600
SERIAL NO

09038691

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Abstract

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The phosphorus concentration of an upper electrode and the phosphorus concentration of a lower electrode can be made equally high without loss of adhesion between the polysilicon and a metallic layer. It includes a step of forming a stacked layer structure consisting of: a lower electrode layer provided on an underlay, a dielectric layer provided on this lower electrode layer, and an upper electrode layer consisting of an impurity-doped layer and a metallic layer successively provided on this dielectric layer, and a step of doping the metallic layer with the same impurity as the impurity in the impurity-doped layer prior to heat treatment of the stacked layer structure.

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Patent Owner(s)

Patent OwnerAddress
OKI SEMICONDUCTOR CO LTD550-1 HIGASHIASAKAWA-CHO HACHIOJI-SHI TOKYO 193-8550

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Azami, Junko Tokyo, JP 3 8

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