Electrically programmable memory and method of programming
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United States of America Patent
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Aug 8, 2000
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N/A
app pub date -
May 20, 1998
filing date -
May 21, 1997
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Abstract
An electrically programmable memory having floating gate FET cells (10.2) each having a drain electrode (10.10), and a source electrode (10.8); a first voltage source for applying simultaneously to one of the drain and source electrodes of a plurality of cells of the memory a first voltage (AGND)for a programming time, the first voltage being selectable so as to determine the multi-level value programmed into the cell, thereby allowing simultaneous multi-level programming of the plurality of cells; a voltage pluse source for applying to the other of the drain and source electrodes of the plurality of cells a succession of voltage pulses (Vpp) during the programming time; and a programming determiner for determining after each of the succession of the voltage pulses whether the cell is programmed to a desired value.
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