Test access port
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United States of America Patent
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-
Aug 8, 2000
Grant Date -
N/A
app pub date -
Oct 29, 1992
filing date -
Oct 29, 1992
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A test access port for an integrated circuit (or circuits) having a test register and a controller is provided. The controller enables the testability functions that have been selected by the test register. The test register performs the select function and the controller performs the enable function. An integrated circuit, having operation circuitry having nodes and external terminals for input and output of signals during normal operation, a test controller connected to at least a first one of said external terminals for receiving signals and for providing output signals during a test operation, and a test register for containing signals representative of selected tests to be performed connected to said test controller and at least a second one of said external terminals and responsive to said output signals of said test controller for enabling selected tests is provided.
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