Controlled impedance interposer substrate and method of making

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United States of America Patent

PATENT NO 6102710
SERIAL NO

09070493

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed through rigid segments and signals are routed through a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected. In another embodiment of the invention, a separate power plate is provided for carrying the power lines. Portions of the power plate, with a multilayered thin film structure thereon, are cut and folded to form interposers. Methods of making single-chip interposers are also disclosed.

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Patent Owner(s)

  • FUJITSU LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beilin, Solomon I San Carlos, CA 53 3551
Chou, William T Cupertino, CA 29 1261
Kudzuma, David San Jose, CA 9 599
Lee, Michael G San Jose, CA 77 2745
Moresco, Larry L San Carlos, CA 23 1118
Murase, Teruo San Jose, CA 11 539
Peters, Michael G Santa Clara, CA 29 1556
Roman, James J Los Altos, CA 20 1269
Swamy, Som S Danville, CA 7 468
Wang, Wen-chou Vincent Cupertino, CA 45 2529

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