Multithreaded processor for processing multiple instruction streams independently of each other by flexibly controlling throughput in each instruction stream
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United States of America Patent
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-
Aug 15, 2000
Grant Date -
N/A
app pub date -
Aug 27, 1997
filing date -
Aug 27, 1996
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A multithreaded processor for executing multiple instruction streams is provided. This multithreaded processor includes: a plurality of functional units for executing instructions; a plurality of instruction decode units, corresponding to the multiple instruction streams on a one-to-one basis, for respectively decoding an instruction, and producing an instruction issue request for designating to which functional unit the decoded instruction should be issued and requesting for the issuance of the decoded instruction to the designated functional unit; a holding unit for holding the priority level of each instruction stream; and a control unit for deciding which decoded instruction should be issued to a functional unit designated by two or more instruction issue requests at the same time, in accordance with the priority levels held by the holding unit.
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