Methods for providing void-free layers for semiconductor assemblies

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United States of America Patent

PATENT NO 6107123
SERIAL NO

09188599

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Abstract

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A method for the removal of voids and gas bubbles within uncured or partially cured microelectronic component enapsulants and adhesive/chip attach layers. A sealed void or gas bubble within a gap between a microelectronic component and a supporting substrate is substantially eliminated through the application of a uniform pressure (isostatic or hydrostatic) and energy such that a substantially void/bubble free interposer is created.

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Patent Owner(s)

Patent OwnerAddress
TESSERA INCSAN JOSE AOZHUO PARK ROAD NO 3025 OF THE STATE OF CALIFORNIA SAN JOSE CALIFORNIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Distefano, Thomas H Monte Sereno, CA 191 14662
Fjelstad, Joseph Sunnyvale, CA 130 7144

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