Dynamic type semiconductor memory device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6108264
SERIAL NO

09234101

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Abstract

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An ordinary read/write operation (normal operation) and a refresh operation are separated from one another and the number of read amplification circuits or, in other words, the number of sense amplifiers operating during the normal operation is made smaller than that during the refresh operation. Accordingly, a bit line charge/discharge current during the normal operation can be reduced.

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Patent Owner(s)

  • HITACHI, LTD.;X-AWARE, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishihara, Masamichi Hamura-machi, JP 72 1690
Shinoda, Takashi Hamura-machi, JP 60 681
Takahashi, Yasushi Tachikawa, JP 193 3896
Udagawa, Tetsu Iruma, JP 15 456
Yanagisawa, Kazumasa Kokubunji, JP 118 2157

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