Error-correcting decoder continuously adding flag signals to locations preceding a first location at which a difference between path metrics is lower than the threshold

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United States of America Patent

PATENT NO 6108811
SERIAL NO

08944292

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Abstract

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In an error-correcting decoder, in which an input digital signal including reliability information is decoded by using a Viterbi algorithm as a first decoding process and a final decoded result is obtained by block-code decoding as a second decoding process, a flag signal is added to a location where a value of reliability of path metric determined by the Viterbi algorithm is lower than a threshold, as an original flagged location. A flag signal adding unit continuously adds flag signals to locations, from the original flagged location to locations preceding the originally flagged location, after back tracing. The flagged locations are then regarded as erasure locations in the block-code decoding process.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI DENKI KABUSHIKI KAISHATOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujita, Hachiro Tokyo, JP 14 211
Nakamura, Takahiko Tokyo, JP 67 596
Yoshida, Hideo Tokyo, JP 223 1974

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