Method of forming multiple gate oxide thicknesses using high density plasma nitridation
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United States of America Patent
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Aug 29, 2000
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N/A
app pub date -
Apr 22, 1998
filing date -
Jun 7, 1996
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Abstract
A method for forming integrated circuits having multiple gate oxide thicknesses. A high density plasma is used for selective plasma nitridation to reduce the effective gate dielectric thickness in selected areas only. In one embodiment, a pattern (12) is formed over a substrate (10) and a high density plasma nitridation is used to form a thin nitride or oxynitride layer (18) on the surface of the substrate (10) . The pattern (12) is removed and oxidation takes place. The nitride (or oxynitride) layer (18) retards oxidation (20b), whereas, in the areas (20a) where the nitride (or oxynitride) layer (18) is not present, oxidation is not retarded. In another embodiment, a thermal oxide is grown. A pattern is then placed that exposes areas where a thinner effective gate oxide is desired. The high density plasma nitridation is performed converting a portion of the gate oxide to nitride or oxynitride. The effective thickness of the combined gate dielectric is reduced.
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