Importance

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Abstract

A universal multi-chip interconnect system using a set of at least two types of standardized interconnect components is disclosed. One of the component types comprises a chip carrier capable of holding at least one IC chip in a first portion thereof and providing a plurality of standardized interconnections from the first portion to one or more second portions of the carrier, where one or more interconnect components of a different type may be connected. Another of the component types comprises a bridge connector which is capable of connecting to two or more chip carriers at their second portions. Each bridge connector has at least two interconnect portions which are capable of connecting to chip carriers at their second portions, and a standardized pattern of interconnect wires between the interconnect portions. Once a set of chip carriers and bridge carriers are assembled in a desired arrangement, a plurality of potentially-active interconnect paths are formed, the total number of which exceeds the number interconnection paths needed by the system. The particular selection of the interconnect paths needed to implement the system's interconnection is accomplished by routing the I/O signals of each IC chip to the pads of the carrier which are coupled to interconnect paths which will provide the desired system interconnectivity. The routing may be accomplished by customizing the interconnect-metalization layer of the and/or by forming a customized pattern of solder bumps (or equivalent connectors) between the IC chip and the surplus-pad chip carrier, and/or other methods disclosed herein.

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First Claim