Compiler for optimization in generating instruction sequence and compiling method
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United States of America Patent
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Sep 5, 2000
Grant Date -
N/A
app pub date -
Jul 1, 1998
filing date -
Feb 14, 1997
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Abstract
A compiler has optimization processing part which comprise a loop normalization processing part for normalizing a loop structure in an intermediate language program, a subscript expression analyzing part for analyzing the presence or not of non-aligned access in the normalized loop structure, an SIMD instruction converting part for modifying an intermediate code so to perform computing of the array elements by using an SIMD instruction sequence, and a non-aligned access processing part for recognizing parts which are not word-aligned access in the array elements on a main storage subjected to the SIMD computing and converting a part of the non-aligned access into a combination of wored-aligned access instructions and shift instructions with logical instructions.
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