Stacked chip assembly utilizing a lead frame
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 12, 2000
Grant Date -
N/A
app pub date -
Apr 26, 1999
filing date -
Apr 26, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A stacked chip assembly generally includes a first chip, a second chip and a lead frame. The lower surface of the first chip is pasted onto the lower surface of the second chip by an adhesive film so as to form a stacked chip body. The stacked chip body is disposed on the lead frame. Bonding pads of the upper surface of the first chip are interconnected to the upper surface of the inner leads of the lead frame by bonding wires. Bonding pads of the upper surface of the second chip are interconnected to the lower surface of the inner leads of the lead frame by bonding wires. Therefore, the first chip and the second chip are simultaneously interconnected to an external circuit devices through the lead frame.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully