Method of contact structure formation

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6121129
SERIAL NO

08784158

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of forming a semiconductor structure having features of differing sizes, includes forming a first layer on a semiconductor substrate; patterning only a first plurality of features of a first feature size on the first layer; removing portions of the first layer, the portions corresponding to the first plurality of features, filling the first plurality of openings; forming a second layer, the second layer overlying the first layer and the filled openings; patterning a second plurality of features of a second feature size on the second layer; removing portions of the first layer and second layer, the portions corresponding to the second plurality of features, the second plurality of openings extending through the first and second layers, and filling the second plurality openings.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
INTERNATIONAL BUSINESS MACHINES CORPORATIONARMONK, NY45084

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Greco, Nancy Anne LaGrangeville, NY 10 133
Greco, Stephen Edward LaGrangeville, NY 10 474
Wagner, Tina Jane Newburgh, NY 1 15

Cited Art Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (7)
* 4855252 Process for making self-aligned contacts 23 1988
* 5126006 Plural level chip masking 81 1991
* 5275963 Method of forming stacked conductive and/or resistive polysilicon lands in multilevel semiconductor chips and structures resulting therefrom 62 1991
* 5266446 Method of making a multilayer thin film structure 100 1992
* 5189506 Triple self-aligned metallurgy for semiconductor devices 32 1992
* 5563012 Multi mask method for selective mask feature enhancement 58 1994
* 5792703 Self-aligned contact wiring process for SI devices 53 1996
 
INTEL CORPORATION (1)
* 5424154 Lithographic emhancement method and apparatus for randomly spaced structures 137 1993
 
RENESAS ELECTRONICS CORPORATION (1)
* 5479054 Semiconductor device with improved planarization properties 40 1993
 
GLOBALFOUNDRIES INC. (1)
* 5472814 Orthogonally separated phase shifted and unphase shifted mask patterns for image improvement 93 1994
 
KABUSHIKI KAISHA TOSHIBA (1)
* 5100812 Method of manufacturing semiconductor device 10 1990
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (1)
* 5760429 Multi-layer wiring structure having varying-sized cutouts 59 1997
 
NEC ELECTRONICS CORPORATION (1)
* 5210053 Method for fabricating semiconductor device 21 1992
 
NORTEL NETWORKS LIMITED (1)
* 5354712 Method for forming interconnect structures for integrated circuits 311 1992
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
* 6534389 Dual level contacts and method for forming 16 2000
 
CYPRESS SEMICONDUCTOR CORPORATION (1)
* 7901976 Method of forming borderless contacts 0 2007
 
U.S. BANK NATIONAL ASSOCIATION (1)
* 2005/0173,747 Methods for making semiconductor structures having high-speed areas and high-density areas 0 2005
 
UNITED MICROELECTRONICS CORP. (1)
* 8058733 Self-aligned contact set 0 2010
 
INTEL CORPORATION (3)
* 8258057 Copper-filled trench contact for transistor performance improvement 18 2006
* 2007/0273,042 Copper-filled trench contact for transistor performance improvement 6 2006
8766372 Copper-filled trench contact for transistor performance improvement 2 2012
 
MICRON TECHNOLOGY, INC. (4)
* 6333254 Methods of forming a local interconnect method of fabricating integrated circuitry comprising an SRAM cell having a local interconnect and having circuitry peripheral to the SRAM cell and method of forming contact plugs 6 2000
6380596 METHOD OF FORMING A LOCAL INTERCONNECT, METHOD OF FABRICATING INTEGRATED CIRCUITRY COMPRISING AN SRAM CELL HAVING A LOCAL INTERCONNECT AND HAVING CIRCUITRY PERIPHERAL TO THE SRAM CELL, AND METHOD OF FORMING CONTACT PLUGS 3 2001
* 7169662 Methods for making semiconductor structures having high-speed areas and high-density areas 4 2003
7095083 Methods for making semiconductor structures having high-speed areas and high-density areas 4 2005
 
AMKOR TECHNOLOGY, INC. (1)
* 9060430 Shielded trace structure and fabrication method 0 2010
 
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (3)
* 6376351 High Fmax RF MOSFET with embedded stack gate 12 2001
* 8405216 Interconnect structure for integrated circuits 1 2005
* 2007/0001,304 Interconnect structure for integrated circuits 82 2005
 
GLOBALFOUNDRIES INC. (1)
* 9330971 Method for fabricating integrated circuits including contacts for metal resistors 0 2014
 
SAMSUNG ELECTRONICS CO., LTD. (1)
* 6861327 Method for manufacturing gate spacer for self-aligned contact 1 2002
 
TEXAS INSTRUMENTS INCORPORATED (1)
* 7968950 Semiconductor device having improved gate electrode placement and decreased area design 0 2007
* Cited By Examiner