US Patent No: 6,121,129

Number of patents in Portfolio can not be more than 2000

Method of contact structure formation

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Importance

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Abstract

A method of forming a semiconductor structure having features of differing sizes, includes forming a first layer on a semiconductor substrate; patterning only a first plurality of features of a first feature size on the first layer; removing portions of the first layer, the portions corresponding to the first plurality of features, filling the first plurality of openings; forming a second layer, the second layer overlying the first layer and the filled openings; patterning a second plurality of features of a second feature size on the second layer; removing portions of the first layer and second layer, the portions corresponding to the second plurality of features, the second plurality of openings extending through the first and second layers, and filling the second plurality openings.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
INTERNATIONAL BUSINESS MACHINES CORPORATIONARMONK, NY68180

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Greco, Nancy Anne LaGrangeville, NY 11 109
Greco, Stephen Edward Lagrangeville, NY 11 235
Wagner, Tina Jane Newburgh, NY 1 12

Cited Art

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (8)
4,855,252 Process for making self-aligned contacts 22 1988
5,126,006 Plural level chip masking 77 1991
5,275,963 Method of forming stacked conductive and/or resistive polysilicon lands in multilevel semiconductor chips and structures resulting therefrom 62 1991
5,266,446 Method of making a multilayer thin film structure 87 1992
5,189,506 Triple self-aligned metallurgy for semiconductor devices 32 1992
5,563,012 Multi mask method for selective mask feature enhancement 47 1994
5,472,814 Orthogonally separated phase shifted and unphase shifted mask patterns for image improvement 85 1994
5,792,703 Self-aligned contact wiring process for SI devices 44 1996
 
INTEL CORPORATION (1)
5,424,154 Lithographic emhancement method and apparatus for randomly spaced structures 133 1993
 
KABUSHIKI KAISHA TOSHIBA (1)
5,100,812 Method of manufacturing semiconductor device 10 1990
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (1)
5,760,429 Multi-layer wiring structure having varying-sized cutouts 55 1997
 
NEC ELECTRONICS CORPORATION (1)
5,210,053 Method for fabricating semiconductor device 21 1992
 
NORTEL NETWORKS LIMITED (1)
5,354,712 Method for forming interconnect structures for integrated circuits 286 1992
 
RENESAS ELECTRONICS CORPORATION (1)
5,479,054 Semiconductor device with improved planarization properties 39 1993

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (4)
6,333,254 Methods of forming a local interconnect method of fabricating integrated circuitry comprising an SRAM cell having a local interconnect and having circuitry peripheral to the SRAM cell and method of forming contact plugs 6 2000
6,380,596 METHOD OF FORMING A LOCAL INTERCONNECT, METHOD OF FABRICATING INTEGRATED CIRCUITRY COMPRISING AN SRAM CELL HAVING A LOCAL INTERCONNECT AND HAVING CIRCUITRY PERIPHERAL TO THE SRAM CELL, AND METHOD OF FORMING CONTACT PLUGS 3 2001
7,169,662 Methods for making semiconductor structures having high-speed areas and high-density areas 4 2003
7,095,083 Methods for making semiconductor structures having high-speed areas and high-density areas 3 2005
 
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (2)
6,376,351 High Fmax RF MOSFET with embedded stack gate 12 2001
8,405,216 Interconnect structure for integrated circuits 0 2005
 
CYPRESS SEMICONDUCTOR CORPORATION (1)
7,901,976 Method of forming borderless contacts 0 2007
 
INTEL CORPORATION (1)
8,258,057 Copper-filled trench contact for transistor performance improvement 0 2006
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
6,534,389 Dual level contacts and method for forming 13 2000
 
SAMSUNG ELECTRONICS CO., LTD. (1)
6,861,327 Method for manufacturing gate spacer for self-aligned contact 0 2002
 
TEXAS INSTRUMENTS INCORPORATED (1)
7,968,950 Semiconductor device having improved gate electrode placement and decreased area design 0 2007
 
UNITED MICROELECTRONICS CORP. (1)
8,058,733 Self-aligned contact set 0 2010