Memory manager for MPEG decoder

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United States of America Patent

PATENT NO 6122315
SERIAL NO

08834158

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Abstract

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An MPEG decoder operates in 2.5 frame store mode, and has an efficient memory management which allows a B picture to be stored and displayed while simultaneously making use of a portion of the frame store memory. The video frame is treated as a grid, having rows of 8.times.8 pixel blocks. The pixel blocks are manipulated in three FIFOs which are cross-connected in a closed loop. Two processes operate on the memory so arranged: (1) a video reconstruction process which writes data into the memory, and (2) a display process, which accesses the memory and writes the video frame into another, external memory in a rastered format. One of the three cross-coupled FIFOs is designated for write-back, and the other two for reading 2:1 interlaced raster data. The two FIFOs utilized for the raster operation are allocated to the alternate lines of the picture.

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Patent Owner(s)

Patent OwnerAddress
CHARTOLEAUX KG LIMITED LIABILITY COMPANY2711 CENTERVILLE ROAD SUITE 400 WILMINGTON DE 19808

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barnes, David A Irvine, CA 27 757

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