Method and apparatus for horizontal congestion removal

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United States of America Patent

PATENT NO 6123736
SERIAL NO

08906949

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Integrated circuit chips (IC's) require proper placement of many cells (groups of circuit components) and complex routing of wires to connect the pins of the cells. Because of the large number of the cells and the complex connections required, it is essential that placement of the cell and the wire routine be done correctly to avoid any congestion of wires. Placement of the cells and the routing of the wires to avoid congestion can be accomplished by determining congestion of various regions, or pieces, of the IC's after an initial placement of the cells and routing of the wires. The present invention discloses a method and apparatus to define the regions, or pieces, of the IC, determine various density measurement of the pieces, and adjust the sizes of the pieces to reduce congestion of congested pieces by reallocating space from uncongested pieces to congested pieces. In addition, the present invention discloses the technique of adjusting the sizes of the piece to minimize disturbing the placement and wire routing while the congestion is being reduced. This is accomplished by comparing the vertical location of each of the pieces to the vertical location of the pieces next to it.

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Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Andreev, Alexander E Moskovskaga Oblast, RU 147 4411
Pavisic, Ivan Cupertino, CA 56 1790
Scepanovic, Ranko San Jose, CA 165 5904

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