Integrated circuit with serial test interface and logic for loading a functional register using said interface
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United States of America Patent
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-
Sep 26, 2000
Grant Date -
N/A
app pub date -
Jun 8, 1998
filing date -
Jun 13, 1997
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Integrated circuit component with terminals for connection to an external communication channel or bus, serial test interface and a configuration register whose content defines operational modes of the integrated circuit, in which the configuration register is loaded with a default configuration, applied externally, through the serial test interface in the course of an initializing phase in which a reset signal applied to the integrated circuit is asserted and in which the default configuration is modifiable via SW or FW, through the external communication channel when the reset signal is deasserted.
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