Process for fabricating a semiconductor device with a patterned metal layer
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United States of America Patent
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Oct 3, 2000
Grant Date -
N/A
app pub date -
Jun 11, 1998
filing date -
Jun 11, 1997
priority date (Note) -
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Abstract
A process is disclosed for fabricating a semiconductor device with a patterned metal layer (9). A layer (7) of a material with poor adhesion capability to the metal is deposited on the surface of a semiconductor substrate. On the layer (7), pattern lines (8) separated by a distance a are formed of a material with good adhesion capability to the metal, and the metal layer (9) is deposited such that by suitable choice of the ratio of the distance a to its thickness d and of its material properties, the metal layer (9) is caused to adhere only to the pattern lines (8) and to the area of the layer (7) between the pattern lines (8).
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