Semiconductor device having an SOI structure and manufacturing method therefor
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United States of America Patent
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Oct 3, 2000
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N/A
app pub date -
Sep 16, 1997
filing date -
Sep 18, 1996
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Abstract
A fine semiconductor device having a short channel length while suppressing a short channel effect. Linearly patterned or dot-patterned impurity regions 104 are formed in a channel forming region 103 so as to be generally parallel with the channel direction. The impurity regions 104 are effective in suppressing the short channel effects. More specifically, the impurity regions 104 suppress expansion of a drain-side depletion layer, so that the punch-through phenomenon can be prevented. Further, the impurity regions cause a narrow channel effect, so that reduction in threshold voltage can be lessened.
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