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Abstract

A current sensing differential amplifier with high rejection of power supply variations and method for an integrated circuit memory device which allows the amplifier's differential voltage level and speed to track that of the sense amplifier supplying the information, thereby achieving the needed margin for critical synchronous timing. The reliability of the differential amplifier is also increased due to the provision of a larger differential signal and higher supply voltage levels. In a preferred embodiment, an n-channel transistor serves as a regulator with its drain terminal coupled to an unregulated supply voltage source ('V.sub.cc '). The gate of the transistor is then coupled to a regulated supply voltage ('V.sub.ccp ') which is a function of the voltage supply for the sense amplifier. The source of the transistor is connected to the sources of the p-channel transistors in the main amplifier which provide feedback to the main amplifier. Consequently, the source side of the feedback transistors cannot go to a voltage higher than V.sub.ccp -V.sub.tn (the threshold voltage of the n-channel transistor), even for wide variations in voltage on the V.sub.cc voltage source.

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First Claim