Method for locating active support circuitry on an integrated circuit fabrication die
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 24, 2000
Grant Date -
N/A
app pub date -
Sep 24, 1999
filing date -
Sep 24, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method for reducing the die size of an integrated circuit by locating, on one of the four sides of the perimeter of an IC die, only the bonding pads (`standard I/O pads`) which provide I/O functionality and which must occupy a predetermined location in accordance with an industry-standard. The active support circuit associated with each of these standard I/O pads is located on one or more of the three other sides at external connection locations which are otherwise unused, or `spare`. The standard I/O pads on the first side of the IC die are connected, via wires, to the corresponding support circuitry on the other sides of the die.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully