Method of manufacturing a semiconductor device using a trench isolation technique

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United States of America Patent

PATENT NO 6143626
SERIAL NO

09330068

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Abstract

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On a semiconductor substrate are successively deposited a silicon dioxide film and a silicon nitride film. The silicon nitride film, the silicon dioxide film, and the semiconductor substrate are sequentially etched using a photoresist film with an opening corresponding to an isolation region, thereby forming a trench. After depositing a diffusion preventing film, there is deposited an insulating film for isolation having reflowability. Although a void is formed in the insulating film for isolation in the isolation region, the insulating film for isolation is caused to reflow, thereby eliminating the void. After that, the whole substrate is planarized by CMP so as to remove the silicon nitride film and the silicon dioxide film, followed by the formation of gate insulating films, gate electrodes, sidewalls, and source/drain regions in respective element formation regions. Thus, in a highly integrated semiconductor device having a trench isolation, degradation of reliability resulting from the opening of the void in the surface of isolation is prevented.

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Patent Owner(s)

Patent OwnerAddress
RPX CORPORATIONFOUR EMBARCADERO SUITE 4000 SAN FRANCISCO CA 94111

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakabayashi, Takashi Osaka, JP 89 854
Segawa, Mizuki Osaka, JP 48 878
Uehara, Takashi Osaka, JP 62 686
Yabu, Toshiki Osaka, JP 37 948

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