Semiconductor memory device
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United States of America Patent
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Nov 7, 2000
Issued Date -
N/A
app pub date -
Nov 7, 1997
filing date -
Mar 15, 1995
priority date (Note) -
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Abstract
A dynamic memory device includes a buried plate-wiring connected to a plate electrode of a memory cell. A plate potential is supplied to the buried plate-wiring via a plate potential supply-wiring. A connection node of the buried plate-wiring and the plate potential supply-wiring is arranged at a side of the memory cell array opposed to a side of a row decoder array.
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