Programmable logic devices with improved content addressable memory capabilities
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United States of America Patent
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Nov 7, 2000
Grant Date -
N/A
app pub date -
Apr 15, 1999
filing date -
Jun 26, 1998
priority date (Note) -
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Abstract
A programmable logic array integrated circuit device includes regions of programmable logic, regions of memory, and a programmable network of interconnection conductors for selectively conveying signals to, from, and between the regions of logic and memory. The memory regions are usable as content addressable memory. Circuitry is provided for facilitating programming of the memory in content addressable mode.
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