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Abstract

Disclosed are structures and processes which are related to asymmetric, self-aligned silicidation in the fabrication of integrated circuits. A pre-anneal contact stack includes a silicon substrate, a metal source layer such as titanium-rich titanium nitride (TiN.sub.x), and a silicon layer. The metal nitride layer is deposited on the substrate by sputtering a target metal reactively in nitrogen and argon ambient. A N:Ar ratio is selected to deposit a uniform distribution of the metal nitride in an unsaturated mode (x<1) over the silicon substrate. The intermediate substrate structure is sintered to form a metal silicide. The silicidation of metal asymmetrically consumes less of the underlying silicon than the overlying silicon layer. The resulting structure is a mixed metal silicide/nitride layer which has a sufficient thickness to provide low sheet resistance without excessively consuming the underlying substrate. A metal nitride of maximum bulk resistivity within the unsaturated (metal-rich) realm is chosen for maximizing asymmetry in the silicidation.

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First Claim