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Abstract

A system and method for system and circuit level design modeling and simulation using the C++ programming language. Program interfaces in a behavior-less base class are provided to allow a circuit designer to model hardware blocks using user processes in C++. The present invention provides for the manipulation of software user processes that represent the behavior of circuit blocks. C++ is advantageous because it is a familiar language for many designers in the computer industry and therefore requires a smaller learning curve. The novel interface provides an efficient implementation of reactivity (waiting and watching) and concurrency (signals and processes) allowing designers to use C++ to model mixed hardware-software systems with a C++ compiler and a library of the present invention without the need of a complex event-driven run-time kernel, often required in other hardware description languages (HDLs). Hardware descriptions of the present invention are readily mapped in to synthesizable intermediate representations and synthesized into hardware implementations using commercially available tools. The novel program interfaces allow user processes, which communicate with signals, to be timed on defined clock edges of various clock objects. User processes respond to events (reactivity) using next( ), wait( ), wait.sub.-- until( ) and watching( ) functions. The present invention provides an efficient mechanism for context switching with reduces processing overhead by using lambdas (delay-evaluated expression objects). The present invention also provides an efficient implementation of representing a circuit's multi-valued logic signals in C++ and also provides an efficient implementation of instantiation of circuit blocks and elements using C++.

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First Claim