Floating gate engineering to improve tunnel oxide reliability for flash memory devices
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United States of America Patent
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Nov 28, 2000
Grant Date -
N/A
app pub date -
Aug 12, 1999
filing date -
Aug 12, 1999
priority date (Note) -
Expired
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Abstract
A method of forming floating gate to improve tunnel oxide reliability for flash memory devices. A substrate having a source, drain, and channel regions is provided. A tunnel oxide layer is formed over the substrate. A floating gate is formed over the tunnel oxide and the channel region, the floating gate being multi-layered and having a second layer sandwiched between a first layer and a third layer. The first layer of the floating gate overlying the tunnel oxide layer includes an undoped or lightly doped material. The second layer is highly-doped. The third layer is in direct contact with a dielectric layer, e.g., an oxide-nitride-oxide stack, and is made of an undoped or lightly doped material. A dielectric material is formed over the floating gate and a control gate is formed over the dielectric material.
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