Semiconductor device and method for manufacturing the same

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United States of America Patent

PATENT NO 6153476
SERIAL NO

09030127

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In a DRAM, a plurality of first MOSFETs are formed in a cell region on a semiconductor substrate based on the minimum design rule, and a first gate side-wall having a side-wall insulation film is formed on the side-wall portion of a first gate electrode of each of the first MOSFETs. At least one second MOSFET is formed in a peripheral circuit region on the semiconductor substrate, and a second gate side-wall having side-wall insulation films is formed on the side-wall portion of a second gate electrode of the second MOSFET. Both the first MOSFETs, which is capable of forming a fine contact hole self-aligned with the first gate electrode, and the second MOSFET, which is capable of sufficiently mitigating the parasitic resistance while suppressing the short channel effect, can be formed on the same substrate.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Inaba, Satoshi Yokohama, JP 67 2693
Kohyama, Yusuke Yokosuka, JP 89 1328
Ozaki, Tohru Tokyo, JP 80 1475
Sunouchi, Kazumasa Yokohama, JP 31 896

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