Fractional frequency divider
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United States of America Patent
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Dec 5, 2000
Grant Date -
N/A
app pub date -
Dec 9, 1998
filing date -
Dec 9, 1998
priority date (Note) -
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Abstract
In systems embodying the invention X clock signals having the same frequency, with each clock signal having a different phase, are supplied to the inputs of a multiplexer whose output is connected to the input of an 'integer' frequency divider circuit; where X is an integer greater than 1. The mulitplexer is controlled to selectively supply different ones of the X clock signals to the frequency divider circuit for producing at the output of the frequency divider circuit a signal whose frequency is a function of the divider ratio of the frequency divider circuit and the sequencing of the clock signals supplied to the frequency divider circuit.
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