Apparatus and method for processing packetized information over a serial bus
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United States of America Patent
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Dec 5, 2000
Grant Date -
N/A
app pub date -
Nov 20, 1998
filing date -
Dec 5, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
An IEEE 1394 serial bus, during bus initialization, transmits a plurality of self-ID packets across the bus. Each node on the bus is operable to receive the self-ID packet from the bus (140) via receiver (146). Asynchronous packets and isochronous packets are stored in a FIFO (166) for later use by a host interface (150). The self-ID packets are verified by a hardware circuit (170) that provides verification of the self-ID packets as they are received without requiring the software to later evaluate the self-ID packets from storage in the FIFO (166). If an error is determined, this is stored in registers (164) for later processing by the host interface (150).
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