Content addressable memory accessed by the sum of two operands
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United States of America Patent
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-
Dec 12, 2000
Grant Date -
N/A
app pub date -
Sep 16, 1996
filing date -
Sep 16, 1996
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Within a content addressable memory, the latency in a memory access is reduced by combining the steps of effective address generation addition and searching within the content-addressable memory. Two inputs to the content-addressable memory are conditioned and then supplied to matching cells, which determine which address stored in the content-addressable memory will be output. This is accomplished without a full adder being implemented to add the two input operands before being supplied to the content-addressable memory.
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