Manufacturing method for laminated chip electronic part

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United States of America Patent

PATENT NO 6165866
SERIAL NO

09209430

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method to manufacture a laminated chip capacitor by laminating and bonding elementary body sheets 14a, 14b which have via holes 17a, 17b and internal electrodes 11a, 11b, and are made of an insulating material, external electrode sheets 15a, 15b which are made of an insulating material, and a dummy sheet 16 which has via hole 17a and is made of an insulating material, treating the sheets to eliminate a binder, and calcining the sheets. This method allows the external electrode sheets 15a, 15b to form external terminal electrodes by themselves, thereby permitting the external terminal electrodes to be formed extremely easily only on two end surfaces of an elementary body opposed to each other.

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Patent Owner(s)

  • TAIYO YUDEN CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kobayashi, Keiichi Tokyo, JP 42 574

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