Content addressable memories
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Jan 2, 2001
Grant Date -
N/A
app pub date -
May 12, 2000
filing date -
May 17, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
A CAM memory is supplied targeted at storing data words whose bits can take on an indifferent logical value besides two complementary logical values. it includes a matrix (MA) of memory cells in which a pair of cells is assigned to each bit that can take on a ternary configuration. circuits (CT1 . . . CT3, WR, SR; CT11 . . . SR1, CT21 . . . SR2) for memory (MA) matrix access control give access for performing comparisons during operation in the CAM mode or for writing/reading data by means of direct RAM mode addressing (FIG. 1).
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