Method for reducing static phase offset in a PLL
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United States of America Patent
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Jan 9, 2001
Grant Date -
N/A
app pub date -
Mar 24, 1999
filing date -
Mar 24, 1999
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An architecture comprising a detector, a first pump circuit, a second pump circuit and a comparator. The detector may present a first active operating signal in response to one or more reference signals. In one example, the first active operating signal may be generated in response to a feedback signal having a parameter within a predetermined range. The first pump circuit may be configured to provide a replica pump signal in response to a current adjustment signal and either (i) at least one of the one or more reference signals or (ii) the first active operating signal. The second pump circuit may be configured to provide a voltage control signal in response to the current adjustment signal and either (i) the first active operating signal or (ii) a second, independent active operating signal. The comparator may be configured to provide the current adjustment signal in response to the replica pump signal and the voltage control signal.
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