Importance

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Abstract

A network interface for an asynchronous cell switched communication network includes a data input, a memory for buffering data received at the data input, and a clock signal generator for providing a clock signal having a frequency which is controlled in accordance with a fill level of the buffer memory. The clock signal is used to control a rate of transfer of data from the buffer memory. Data received at the network interface device is consumed by a buffer, typically a FIFO device. When the buffer fill level exceeds a predetermined level, the clock signal frequency is increased and conversely, when the buffer fill level drops below the predetermined level, the clock signal frequency is decreased.

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First Claim