Directly accessing local memories of array processors for improved real-time corner turning processing
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United States of America Patent
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Jan 9, 2001
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N/A
app pub date -
Apr 9, 1998
filing date -
Apr 9, 1998
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Abstract
An apparatus for processing data has a plurality of single-bit processing elements coupled together to form an m.times.n processing element array, where m is an integer number of rows and n is an integer number of columns. Each processing element has addressable storage for storing pixel data in an array format in which each addressable storage holds all of the bits associated with one pixel; and the processing element array includes a mechanism for providing direct read/write access to the addressable storage located in any addressed row of the processing element array without requiring that data be passed through other rows of the array. The apparatus also includes an addressable input/output memory for storing pixel data in a raster scan order; and pixel corner-turning logic, coupled to the input/output memory and to the processing element array, for transferring pixel data between the input/output memory and the processing element array, and for reordering bits of the pixel data being transferred so as to convert between the raster scan order and the array format.
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