Semiconductor integrated circuit with low-power bus structure and system for composing low-power bus structure

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United States of America Patent

PATENT NO 6175886
SERIAL NO

09143544

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Abstract

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A bus (9) is structured to reduce Dower consumption. The bus (9) is used to transfer data among functional blocks (1, 3, 5, 7) formed on an LSI chip. The bus is divided into subsections (9a, 9b, 9c). A pair of the functional blocks (1, 7) whose frequency of mutual data transfer is high is connected to the same subsection (9b). Connectors (29, 31) are inserted between the subsections so that the subsections may optionally electrically be connected to and disconnected from each other. When data is transferred between the functional blocks whose frequency of mutual data transfer is high, the subsection to which the functional blocks in question are connected is electrically disconnected by the connectors from the other subsections.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Usami, Kimiyoshi Kanagawa-ken, JP 37 512

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