Active matrix display with synchronous up/down counter and address decoder used to change the forward or backward direction of selecting the signal or scanning lines
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United States of America Patent
Stats
-
Jan 23, 2001
Grant Date -
N/A
app pub date -
Oct 2, 1995
filing date -
Oct 3, 1994
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
In a signal line driver circuit for an active matrix type display device for performing a plurality of gradation displays, an output signal of a synchronous type clock counter is supplied as an address signal to an address decoder circuit through address lines. Gradation data is stored in latch circuits in accordance with the address signal used as latch pulse. In a synchronizing circuit, an output timing of the gradation data stored in the latch circuits is synchronized with a display scan timing. After the output gradation data is converted into an analog gradation voltage, the analog gradation voltage is applied to a pixel portion through an analog switch.
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