Method and apparatus for manufacturing a semiconductor integrated circuit
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United States of America Patent
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Jan 30, 2001
Grant Date -
N/A
app pub date -
Jun 1, 1995
filing date -
Dec 6, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and an apparatus for manufacturing a semiconductor integrated circuit in which semiconductor elements (2) and a wiring structure connecting the semiconductor elements (2) one another are located on a semiconductor substrate (1). In the method or apparatus, a series of wiring elements (4,6,7,9,10), each of which constructs the wiring structure is formed sequentially, then the semiconductor integrated circuit under manufacturing process is washed by neutral solution containing oxidant during the process of forming of the wiring elements (4,6,7,9,10).
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