Low cost chip size package and method of fabricating the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6181569
SERIAL NO

09326905

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A first plurality of metal bumps is formed on a semiconductor wafer containing a plurality of chips, each of the first plurality of bumps being in electrical contact with a contact pad on one of the chips. An encapsulant layer is deposited over the first plurality of metal bumps and then polished to expose a top surface on each of the metal bumps. A second plurality of metal bumps is formed on the exposed top surfaces of the first plurality of plurality of bumps, respectively. The wafer is then sawed to separate the individual chips, yielding semiconductor packages which have the same lateral dimensions as the chips. Alternatively, to facilitate the encapsulation process, the wafer can be sawed into rectangular, multi-chip segments before the encapsulant layer is deposited. After the encapsulant layer has been applied and polished and the second plurality of conductive bumps have been formed, the segments are then separated into individual chips. The first plurality of metal bumps can be deposited directly on the contact pads, with or without an underbump metalization layer, or on metal conductive traces over one or more dielectric layers.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
CHAKRAVORTY KISHORE KNot Provided

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chakravorty, Kishore K 6407 Berwickshire Way, San Jose, CA 95120 43 1687

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation