Minimizing program code storage for performing regular and repetitive operations in a programmable processor
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United States of America Patent
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Feb 6, 2001
Grant Date -
N/A
app pub date -
Feb 21, 1996
filing date -
Feb 23, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The program memory comprises a first segment (MP1) containing a succession of program words including first base words (MMA) each having a size less than the sum of the respective sizes of the control words destined for the execution units (UXi), and second base words (MMB) fewer in number than that of the first base words. Facilities sequentially extract the various program words from the first segment of the program memory. A storage facility (RG) is connected to the output of the program memory. Facilities (MXM) update the content of the storage facility at least on the basis of each extracted second base word, and computational facilities (MEB) sequentially compute certain at least of the various groups of control words, on the basis of the combining according to at least one predetermined logic relation, of the content of the storage facility and of an extracted first base word, so as to minimize the memory size of the said program code.
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