System for correcting an illegal addressing signal by changing a current bit from one to zero if a bit immediately left adjacent to the current bit is zero

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6185649
SERIAL NO

09081693

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An apparatus and a method detect and automatically correct an illegal address in a peripheral connect interface bus addressing scheme. The value of a current bit is read. The value of a bit immediately left adjacent of the current bit is read. A value of 0 is outputted as the current bit in the event the value of the current bit is 1 and the value of the left adjacent bit is 0. In one specific embodiment, the apparatus employs a multiplexer and a single-bit register with a feedback as a one bit detection and correction circuit.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
TOSHIBA AMERICA ELECTRONIC COMPONENTS INC9740 IRVINE BOULEVARD SUITE D700 IRVINE CA 92618

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lo, John M Fremont, CA 8 106

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation