System and method for verifying proper connection of an integrated circuit to a circuit board

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United States of America Patent

PATENT NO 6188235
SERIAL NO

08557039

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Abstract

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A test method for verifying proper connection of a CMOS IC uses measurements of a transistor within the IC which can be done with a conventional transistor tester. The transistor has its base connected to a ground pin of the IC, its collector connected to a signal pin of the IC, and its emitter connected to another signal pin of the IC. A second collector of the transistor is connected to a supply voltage pin. The method uses a first step in which suitable voltages are applied to the emitter, base and first collector to turn the transistor on, whereupon the first collector current and second collector voltage are measured. In a second step, the same voltages are applied to the emitter and base as were applied in the first step and a voltage is applied to the second collector which is equal to the voltage measured there in the first step. In a third step, the first collector current measured in the first step is subtracted from the second collector current of the second step, resulting in the true collector current. Alternatively, the method begins with the same first step as described above and in a second step a voltage equal to that measured at the second collector is applied to the second collector while additional current flowing between the collectors is measured. In a third step, the first collector current from the first step is subtracted from the additional current of the second step to give true collector current.

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Patent Owner(s)

Patent OwnerAddress
SCORPION TECHNOLOGIES AGPAPENREYE 51 HAMBURG 22453

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Buks, Manfred Henstedt-Ulzburg, DE 5 48
Hosseini, Karim Hamburg, DE 2 8

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