Input/output buffer managed by sorted breakpoint hardware/software
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United States of America Patent
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Feb 20, 2001
Grant Date -
N/A
app pub date -
May 2, 1997
filing date -
May 2, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
A data processing device uses a portion of a random access memory as an input buffer for holding a portion of a stream of data which is being processed by a processing unit within the processing device. Various break-point source tasks 801a-n determine discontinuities in the portion of data stored in the input buffer and a sorted list of the addresses of the discontinuities is maintained in breakpoint queue 800. Since the buffer is managed in a FIFO manner, a single breakpoint register 810 is sufficient to monitor addresses as they are provided by an address register 820 for accessing the random access memory. When a breakpoint is detected, the breakpoint queue and the breakpoint register is updated by an update task 802.
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