Semiconductor device, semiconductor integrated circuit device, and method of manufacturing same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6198151
SERIAL NO

09176417

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

It is an object to integrate storing functions at a high density and make it possible to perform a stable operation even at a low power supply voltage. A MOS transistor including a gate electrode and an n-type impurity region serving as a source-drain has a memory capacitor comprised by a dielectric film, a conductor, and an n-type impurity region opposing to the conductor through the dielectric film in a first trench formed in a p-type epitaxial layer beneath the gate electrode. With this structure, an area occupied by the MOS transistor and the memory capacitor can be minimized. Each unit memory cell is a two-transistor memory cell in which the drain and source of a MOS transistor supply a pair of complementary signals to a detection circuit. For this reason, a storing operation can be made reliable, and a stable operation can be realized, especially, at a low voltage.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
NIPPON STEEL SEMICONDUCTOR CORPORATIONTATEYAMA-SHI 1580 YAMAMOTO CHIBA-KEN

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wada, Toshio Tateyama, JP 31 1071

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation