Programmable logic device
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United States of America Patent
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Mar 6, 2001
Grant Date -
N/A
app pub date -
Feb 22, 1999
filing date -
Feb 23, 1998
priority date (Note) -
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Abstract
A logic cell for a programmable logic device that features a random access memory adapted to selectively function as additional logic functions for the logic cell or one of a several different types of random access memory. For example, the random access memory may be configured to provide AND-OR logic functions or as a 32.times.1 single input port random access memory, two 16.times.1 single input port random access memories or a 32.times.1 dual input port memory.
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