Apparatus and method for storing a device row indicator for use in a subsequent page-miss memory cycle

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United States of America Patent

PATENT NO 6199151
SERIAL NO

09092591

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Abstract

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An apparatus and method for selecting a row of memory devices. A row value that indicates one of a plurality of chip select signals is stored in a storage element that is associated with a first address. A memory access request is received that includes the first address. The one of the plurality of chip select signals indicated by the row value is asserted to select one of a plurality of rows of memory devices.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hunsaker, Mikal El Dorado Hills, CA 22 181
Murdoch, Robert N late of Sacramento, CA 13 396
Williams, Michael W Citrus Heights, CA 50 1743

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