Electronic memory with disturb prevention function
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 13, 2001
Grant Date -
N/A
app pub date -
May 28, 1999
filing date -
May 28, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A ferroelectric destructive read-out memory system includes a power source, a memory array including a memory cell, and a logic circuit for applying a signal to the memory array. Whenever a low power condition is detected in said power source, a disturb prevent circuit prevents unintended voltages due to the low power condition from disturbing the memory cell. The disturb prevent circuit also stops the operation of the logic circuit for a time sufficient to permit a rewrite cycle to be completed, thereby preventing loss of the data being rewritten.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully