Rapid acquisition dispersive channel receiver integrated circuit
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United States of America Patent
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Mar 13, 2001
Grant Date -
N/A
app pub date -
Feb 25, 1999
filing date -
Feb 25, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An integrated circuit includes a reconfigurable FIR filter has an input port for receiving digital input signals and an output coupled to a coherent signal processor and a coherent memory. The FIR filter programmably provides filtered signals to the coherent signal processor for storage in the coherent memory. The integrated circuit further includes a sequential weight processor having an input coupled to an output of the coherent memory. The sequential weight processor includes a weight memory and operates to output symbol soft decision data resulting from processing the digital input signals. The integrated circuit is programmable into one of a plurality of operating modes, including at least one of a received signal acquisition mode, a channel estimator mode, an adaptive equalizer mode, and a channel-wise differential mode.
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