Host adapter capable of simultaneously transmitting and receiving data of multiple contexts between a computer bus and peripheral bus
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United States of America Patent
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Mar 13, 2001
Grant Date -
N/A
app pub date -
Jun 2, 1998
filing date -
Jun 2, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A host adapter has receive and transmit data paths, each of which includes a buffer (formed of storage elements) for temporarily holding the data being transferred by the host adapter. The host adapter uses each of the two buffers for storing only the data being transferred in the respective direction, each independent of the other, for full-duplex data transfer therethrough. To maximize bandwidth and minimize latency, during operation in any given direction of data transfer (e.g. from the computer bus to the peripheral bus or vice versa) the host adapter uses at least two memory portions in a data path simultaneously: one for receipt and another for transmission. Specifically, each data path uses a memory portion to hold data that is currently being received, while using another memory portion containing data that was previously received for simultaneous transmission from the host adapter. Each of the data paths transfers data in a continuous manner irrespective of the context (e.g. peripheral device address, or system memory address or a sequence identifier of a Fibre Channel frame) of the data.
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