
US Patent No: 6,205,574
Number of patents in Portfolio can not be more than 2000
Method and system for generating a programming bitstream including identification bits
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Mar 20, 2001
Issued date -
Jul 28, 1998
filing date -
09/124,464
serial no -
In Force
status
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Abstract
A method and system for generating a programming bitstream for a programmable gate array. A programming bitstream for the programmable gate array is generated in response to an input design specification. The programming bitstream includes one or more unused segments, either interspersed through the bitstream or appended to the end of the bitstream, wherein an unused segment includes bits that are not used for programming the programmable gate array. One or more selected items of information are encoded to form binary representations of the items. The binary representations are inserted into one or more of the unused segments of the programming bitstream.
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International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
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| 5,321,704 Error detection structure and method using partial polynomial check | 38 | 1991 | |
| 5,581,738 Method and apparatus for back-annotating timing constraints into simulation models of field programmable gate arrays | 34 | 1993 | |
| 5,648,913 Frequency driven layout system and method for field programmable gate arrays | 57 | 1995 | |
| 5,946,478 Method for generating a secure macro element of a design for a programmable IC | 32 | 1997 | |
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| 5,457,408 Method and apparatus for verifying whether a bitstream received by a field programmable gate array (FPGA) is intended for that FPGA | 101 | 1994 | |
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| 5,745,734 Method and system for programming a gate array using a compressed configuration bit stream | 180 | 1995 | |
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| 5,394,031 Apparatus and method to improve programming speed of field programmable gate arrays | 70 | 1993 | |